Design And Analysis Of Application-specific Instruction Set Processor (asip) For Huffman Coding
DOI:
https://doi.org/10.34818/eoe.v8i6.17029Abstract
Abstract Microprocessors are much important part of computers and IoT. In technology needs, the microprocessor is a tool to help the performance in the system on that technology. Technology requires a microprocessor because the microprocessor has components to produce output according to the commands given to the microprocessor. In the previous microprocessor design, the microprocessor has design to run a computer or technological device that requires a large memory capacity to store data and commands on the microprocessor. Along with the excessive of using are memory and commands, the microprocessor suffers from a decrease in performance which causes the microprocessor overkill. Overkill is a problem when the microprocessor experience a performance slow down due to the large number of commands and memory that the microprocessor receives. Overkill on the microprocessor also occurs because there are too many bits, so the microprocessor is no longer relevant in improving its performance. To overcome this solution, this research design a microprocessor with an instruction set processor (ASIP) using Huffman Coding so the microprocessor can work according to the instruction ordered. The software to designing this microprocessor uses Altera Quartus with Verilog HDL as programming language. This simulation to determine the measurement of microprocessor performance and determine can accommodate the instructions of Huffman Coding. The measurement results in Analysis and Synthesis in Altera Quartus, microprocessor design has a spare element capacity of 6272 elements comparison to the intel 8088 microprocessor. From the measurement result, the design of this microprocessor can accommodate the inctructions given from Huffman Coding that the resulting bit do not exceed the required capacity. This thesis is continuation of Nimas Sekar Fatihah Thesis’s is discusses Huffman Coding. Keyword : Microprocessor, Altera Quartus, Verilog HDL, ASIP, Huffman CodingReferences
[1] N. Karna, N. Fatihah, and D. Kim, “generic,” in 2019 International Conference on
Information and Communication Technology Convergence (ICTC), 2019, pp. 612–616.
[2] P. Deshmane, M. Lad, and P. Mhetre, “8 Bit Microprocessor Using VHDL,” vol. III, no.
Iv, pp. 241–246, 2014.
[3] G. R. Gare and K. P. A. L. R, “Custom 8 Bit Microprocessor Designing and Implementation
on FPGA Board,” pp. 113–118, 2016.
[4] R. Praisline Jasmi, B. Perumal, and M. Pallikonda Rajasekaran, “huffman,” in 2015
International Conference on Computer Communication and Informatics (ICCCI), 2015, pp.
1–5.
[5] N. Karna, N. Fatihah, and D. S. Kim, “Evaluation of DLX Microprocessor Instructions
Efficiency for Image Compression,” ICTC 2019 - 10th International Conference on ICT
Convergence: ICT Convergence Leading the Autonomous Future, pp. 612–616, 2019.
[6] H.-y. Shen, J.-h. Liu, and J.-h. Li, “Application of Quartus II in Digital Electronic
Technology Teaching,” no. Amee, pp. 103–106, 2018.
[7] L. Isola, “Design and VHDL Implementation of an Application-Specific Instruction Set
Processor,” 2019.
[8] R. J. Hayne, T. Citadel, R. J. Hayne, and C. Engi, “AC 2011-5 : AN INSTRUCTIONAL
PROCESSOR DESIGN USING VHDL An Instructional Processor Design using VHDL
and an FPGA,” 2011.
